Products

Ground Segment Receiver

Keywords: API, AWGN, CCSDS 131.2-B, data storage, Decoder, Demodulator, Doppler, Ethernet, GUI, PN23, QSFP+, rack-mountable, Receiver, Satellite Downlink, SCCC, SMA, Telemetry

The Ground Segment Receiver is a hardware unit able to lock onto a Serially Concatenated Convolutional Codes (SCCC) signal compliant with the CCSDS 131.2-B standard. The unit consists of three main parts: an internal test modulator, a Control PC and the SCCC Receiver. The Ground Segment Receiver is designed with a scalar approach and it is available in four different versions in terms of number of channels and maximum data rate supported:

  • Cost-optimized single channel with maximum data rate of 600 MBaud;
  • Cost-optimized dual channel with maximum data rate of 600 MBaud for each channel;
  • High-speed single channel with maximum data rate of 1200 MBaud;
  • High-speed dual channel with maximum data rate of 1200 MBaud for each channel, with cross-polarization interference cancellation.

The internal test modulator, available as option, embeds functionality of encoding and modulation compliant with the CCSDS 131.2-B standard, and channel emulator for Additive White Guassian Noise (AWGN) and Doppler effect, and it supports a maximum data rate of 1200 MBaud for each input channel.

The Control PC handles configuration and communication with the external host PC: the Ground Segment Receiver can be remotely configured, controlled and monitored with a GUI or with dedicated API through Ethernet interface. Moreover, the Control PC handles local data storage and high-speed communications through additional dedicated Ethernet interfaces.

The SCCC Receiver unit is a high-performance receiver compliant with the CCSDS 131.2-B standard and capable of receiving intermediate frequency analog signals with a symbol rate up to 1200Mbaud.

The Ground Segment Receiver has been developed within the framework of an ESA project.

Key features

 
  • Compliant with CCSDS 131.2-B standard
  • Tunable intermediate frequency in the range [530 MHz; 2.4 GHz]
  • Signal bandwidth up to 1620 MHz
  • Symbol rate up to 1200 Mbaud
  • Input signal power level in the range [-50 dBm; -10 dBm]
  • Selectable 10 MHz clock reference (external or internal)
  • Available in four versions differentiated by number of channels and maximum supported data rate
  • Optional embedded internal test modulator compliant with CCSDS 131.2-B standard with PN23 pseudo-noise sequence generator and QSFP+ digital input to encode user data
  • Optional embedded internal channel emulator for AWGN and Doppler effects
  • Real-time monitoring outputs related to current ACM; SNR; BER / CER / FER; constellation scatter plot
  • Internal data storage of the decoded data
  • 50-Ohm SMA female connectors for analog signal input (i.e.; to SCCC Receiver) and output (i.e.; from optional internal test modulator)
  • 4u 19-inch rack-mountable metallic case
  • Weight not exceeding 20 kg
  • Remote configuration control and monitoring via GUI or API through Ethernet interface

Other information

Technologies/Applications

  • CCSDS 131.2-B

Competencies

  • FPGA/ASIC design
  • Verification
  • Digital signal processing

Call us at 0039 050 6220532 or email us at request@ingeniars.com