Products

CCSDS 131.2-B Transmitter IP Core

Keywords: 16-/32-/64-/128-/256-APSK, 8PSK, ASIC, CCSDS 131.2-B, Decoder, Demodulator, FPGA, IP Core, Microsemi PolarFire RT, QPSK, Satellite Downlink, SCCC, Telemetry, Xilinx XQRKU060

A considerable number of Earth Observation missions are based on small satellites class and embark payloads producing substantial data rates, thus requiring a reliable, efficient and economical payload data transmitter specialised for medium to high data rates (i.e., from hundred Mb/s to several Gb/s).

Such missions would benefit from employing state-of-the-art coding and modulation standard, allowing to exploit the protection offered by modern coding techniques while at the same time maximizing the supported data rates by using spectral efficient modulation formats.

The CCSDS 131.2-B Transmitter IP Core is fully compliant with the CCSDS 131.2-B standard, combining powerful Serially Concatenated Convolutional Codes (SCCC) with modulations ranging from QPSK to 8PSK and 16-, 32- and 64-APSK, for a total of 27 Modulation and Coding formats (ModCods). In addition, the IP Core also supports the extended range of ModCods, involving 128-APSK and 256-APSK modulations with combined SCCC/BCH coding.

Such flexibility, thanks to the number of modulation and coding formats (ModCod) provided, will help configuring the system to better adapt to the specific target requirements.

The CCSDS 131.2-B Transmitter IP Core has been developed within the framework of an ESA project.

Key features

 
  • Fully compliant with CCSDS 131.2-B standard
  • Optionally compliant with CCSDS 131.21-O-1 experimental specification
  • Includes static symbol pre-distortion to mitigate non linearity
  • Optional Square-Root Raised Cosine (SRRC) baseband filtering
  • Optional mitigation techniques to safely operate in space environment: EDAC on internal memories Dead-lock free FSM design with one-hot encoding
  • Coded in technology-independent highly configurable VHDL
  • Support of all the 27 ModCods in a single instantiation for high capacity FPGAs for space (e.g. Microchip RT PolarFire; Microchip RTG4; Xilinx Kintex Ultrascale XQRKU060)
  • High data-rate IP core option for symbol rates higher than 1200 Mbaud and input data rates higher than 6.5 Gb/s
  • Validation on commercial Microchip RTG4 development kit

Other information

Technologies/Applications

  • CCSDS 131.2-B

Competencies

  • FPGA/ASIC design
  • IP Core design
  • Verification
  • Digital signal processing

Downloads

CCSDS 131.2-B Transmitter IP Core Brochure
Download

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